- DRC
- Design Rule Check. KiCad checks board geometry such as clearances, widths, keepouts, and connectivity against the rules defined by the project. BoardReadyOps keeps the resulting evidence tied to the exact commit being reviewed instead of treating a local DRC run as timeless proof. Track clearances, annular rings, track widths, hole sizes, and microvia rules across all copper layers deterministically.
- ERC
- Electrical Rules Check. ERC catches schematic-level problems such as incompatible pin types, missing drivers, and unconnected signals. It complements DRC: a board can be geometrically clean while the schematic still contains an electrical contradiction that should block release. Pin-to-pin directionality, power supply conflicts, floating inputs, and netlabel mismatches are surfaced before tapeout.
- BOM
- Bill of materials. BoardReadyOps evaluates the part list that belongs to the release, including manufacturer part numbers, lifecycle signals, variant consistency, approved alternates, and evidence that the selected parts match the design being handed off. It guards against obsolete silicon, unpopulated references, ambiguous packaging codes, and out-of-stock components before placement.
- Manufacturing package
- The fabrication and assembly deliverables required by the chosen handoff: Gerbers, drill data, BOM, position files, and drawings. BoardReadyOps can generate these through boardreadyops generate (wrapping kicad-cli) or validate the outputs generated by your existing toolchain. A manifest inventories output files and checksums; without an independently verified export attestation, it cannot prove the exact outputs came from the reviewed commit.
- Release evidence
- Versioned facts used to justify a hardware release decision include check results, manifests, hashes, reports, workflow runs, and manufacturing outputs. Reviewers can follow run timestamps, commit context, execution outcomes, and artifact SHA-256 digests where those details are recorded. Individual findings or assertions do not necessarily contain every kind of evidence.
- Check Run
- GitHub's native status-and-detail record for a commit. BoardReadyOps publishes a concise readiness conclusion and links findings, workflow records, and available artifacts for review. It annotates supported findings when a source file and line location are available; findings without line locations remain accessible in the linked report.
- Exact-commit evaluation
- The rule that every release decision must identify the immutable Git commit it evaluated. A moving branch name is not enough: if the branch changes after a check begins, the evidence remains attached to the original revision rather than silently describing different source. This helps reviewers reconstruct which source revision was checked; independently trusted output provenance requires additional evidence.
- CPL / position file
- The component placement list used by an assembler to place parts on the PCB. Coordinates, rotation, side, reference designators, and package identity need to agree with the released board and BOM. BoardReadyOps checks whether configured position outputs cover populated references and can flag custom footprints for manual pin-1 marker review. It does not certify placement rotations or coordinate origins.
- Waiver
- An explicit, reviewable decision to accept a known finding under defined conditions. BoardReadyOps treats waivers as evidence with scope and history, not as a way to erase a warning from the record. The underlying finding remains understandable to future reviewers, carrying author justification, expiration parameters, and project owner sign-off.
- Source of truth
- The protected repository commit and its GitHub workflow evidence. BoardReadyOps presents and normalizes that evidence, but the repository, pull request, Check Run, workflow history, and versioned files remain authoritative for what was reviewed and released. No external database overrides what the cryptographic Git log proves.
- Gerbers (RS-274X & X2)
- Gerber vector artwork represents PCB copper, solder mask, silkscreen, and board outlines. BoardReadyOps reads layer roles, coordinate declarations, supported aperture definitions, and representable outline contours; complex Gerber aperture macros and blocks may remain unmodelled and are reported as incomplete geometry. This evidence helps reviewers spot fabrication-package issues but does not certify a manufacturable board.
- IPC-2581 & ODB++
- IPC-2581 and ODB++ are manufacturing exchange formats that can carry layer, drill, component placement, and electrical netlist data. BoardReadyOps can detect and parse supported IPC-2581 data. ODB++ schema validation and comprehensive exchange-format-to-board-stackup verification are not part of the current release-readiness checks.
- Annular Ring & Drill Breakout
- The margin of copper pad surrounding a drilled via or through-hole lead. Inadequate annular ring width risks drill breakout during multi-layer board lamination, leading to intermittent opens or impedance discontinuities. Configured checks can flag annular-ring risks; final factory tolerances and process capability still need review.
- Solder Mask Dam & Web Clearance
- The minimum physical bridge of solder mask material between adjacent surface-mount pads. Missing or undersized webs can increase solder-bridging risk. BoardReadyOps checks for matching solder-mask layers on copper sides in a Gerber package, but does not measure solder-mask web clearance or certify it against a fabricator's process limits.
- Impedance & Layer Stackup
- Controlled dielectric heights, copper weights, and trace geometries matter for high-speed, RF, and differential-pair routing. BoardReadyOps compares the parsed PCB stackup layer count with the configured expected copper-layer count. This does not independently verify impedance, dielectric properties, or drawing-to-Gerber stackup equivalence; those require engineering and fabrication review.